1. Field of the Invention
The present invention generally relates to a memory device, and more specifically, to a phase change resistor cell comprising a cross-point cell using a phase change resistor and a serial diode switch, a nonvolatile memory device using the phase change resistor cell to improve the whole size, and a control method using the same.
2. Description of the Prior Art
In general, nonvolatile memories such as a magnetic memory and a phase change memory (hereinafter, referred to as “PCM”) has a data processing speed as fast as a volatile Random Access Memory (hereinafter, referred to as “RAM”) and conserves data even after the power is turned off.
FIGS. 1a to 1d are diagrams illustrating a conventional phase change resistor 4 (hereinafter, referred to as “PCR”).
The PCR 4 comprises a top electrode 1, a bottom electrode 3 and a PCM 2 inserted therebetween. If a voltage or current is applied to the PCR 4, the PCM 2 reaches a high temperature state. As a result, resistance is changed, and then an electric conduction state is also changed. Here, AgInSbTe has been widely used as the PCM 2.
As shown in FIG. 1c, if low current having less than a threshold value flows in the PCR 4, the PCM 2 is heated to a proper temperature for crystallization. As a result, the PCM 2 is changed into a crystalline phase, and the PCR 4 reaches a low resistance state.
On the other hand, as shown in FIG. 1d, if high current having more than the threshold value flows in the PCR 4, the PCM 2 is heated at a temperature of over a melting point. AS a result, the PCM 2 is changed into an amorphous phase, and reaches a high resistance state.
As described above, the PCR 4 can store data corresponding to the states of two resistances as nonvolatile sates. In other words, if the low resistance state of the PCR 4 refers to data “1” and the high resistance state of the PCR 4 refers to data “0”, the PCR 4 can store logic values of the two data.
Meanwhile, the conventional memory device comprises a switch device and a memory device for storing data. Here, the switching device of the conventional memory device is a NMOS transistor whose switching operation is controlled by a gate control signal.
However, the above-described NMOS transistor requires an additional area for gate control when a cell array is embodied with a switching device, which results in increase of the whole chip size.